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Bitalyzer

主要特性

  • 码型生成和误码分析、高达 1.6 Gb/s 的高速 BER 测量
  • 集成的 BER 关联眼图分析以及通过/不通过模板
  • 在高达 1.6 Gb/秒的 PRBS 信号上进行误码定位和 BER 轮廓分析
  • ANSI 抖动测量(RJ、DJ 和 TJ)

Specifications

All specifications are guaranteed unless noted otherwise. All specifications apply to all models unless noted otherwise.

Pattern generator specifications
Maximum frequency
BA1500
1500 MHz (1.5 GHz)
BA1600
1600 MHz (1.6 GHz)
Minimum frequency
Internal clock
800 kHz
External clock
100 kHz
External clock/pattern start
SMA
Configuration
Single ended
Threshold
–2 V to +4 V
Termination
–2 V to +3.3 V
Clock/data output
SMA
Configuration
Differential
Amplitude
70 mV to +2 V
Offset
-1.85 V to +3.85 V
Logic families
PECL/LVPECL/LVDS LVTTL/CML/ECL
Rise/Fall
≤130 ps 1
Delay range
30 ns or 1 UI
Delay resolution
1% UI or 1 ps

1Rise/Fall times are measured 20% to 80% with PECL logic family settings.

Trigger output
BNC
Type
CLK/64 or pattern
Pattern position
Programmable
Amplitude
>1 V
A/B pattern switch
BNC
Threshold
TTL
Data types
Pseudo-random
x7 + x6 + 1 

x15+ x14+ 1 

x20+ x17+ 1 

x23+ x18+ 1 

x31+ x28+ 1 

User defined
96 bits - 8 Mb

2-4 Mb A/B pages

32-bit word size

Error insertion
Length (bits)
1, 2, 4, 8, 16, 32, 64, 128 
Frequency
Single or repetitive
Error detector specifications
Maximum frequency
1600 Mb/s
Minimum frequency
BER measurements
100 Kb/s
Auto-optimize eye
70 Mb/s
Physical-layer tests
70 Mb/s
Clock/Data Inputs
SMA
Configuration
Differential or single
Threshold
-2 V to +4 V
Termination
-2 V to +3.3 V
Delay range
30 ns or 1 UI
Delay resolution
0.1% UI or 1 ps
Sampling edge
Rising or falling clock
Sensitivity - Single
60 mVp-p (typical)
Sensitivity - Differential
40 mVp-p (typical)
Start detect
SMA
Configuration
Single ended
Threshold
-2 V to +4 V
Termination
-2 V to +3.3 V
Function
Trigger data grab
Trigger output
BNC
Type
CLK/64 or pattern
Pattern position
Programmable
Amplitude
>1 V
Error output
BNC
Function
32-bit pulse at error
Amplitude
>1 V
Marker input
BNC
Threshold
TTL
Function
Error analysis locator
Maximum frequency
4 kHz recommended
Blank input
BNC
Threshold
TTL
Function
Ignore errors at active
Re-synchronization
Opt. triggered by edge
Minimum resolution
32 bits
Data types
Pseudo-random
x7 + x6 + 1 

x15+ x14+ 1 

x20+ x17+ 1 

x23+ x18+ 1 

x31+ x28+ 1 

User defined
96 bits - 8 Mb

32-bit word size

Re-synchronization
Manual
Push-button or blank
Automatic
Programmable error threshold
User grab
Find repeating pattern
User shift
Hardware pattern search
Data capture
Up to 8 Mb capture
Measurements
BER, bit, re-sync PG/ED clock frequency
Views
Home view
Starting page
Generator
Generator settings
Detector
Detector settings
Editor
Edit patterns, masks
System
Utility tools
Log
Long-term BER log
Error analysis views
Standard
Basic BER
Table of BER statistics
Burst length
Histogram of burst size
Error-free interval
Histogram of intervals
Correlation
Error position histogram
Pattern sensitivity
Errors within pattern
Block mode
Errors per block histogram
Strip chart
BER versus time chart
Physical layer test views
Optional
Eye diagram
Display eye diagram
BER contour
Map BER around eye
Mask test
Perform mask tests
Jitter analysis
DJ/RJ/TJ jitter measurement
Q-factor analysis
Setup and display Q
Error location capture
Live analysis
Continuous
Error logging capacity
Maximum 2 GB file size
Error events
10,000 
Maximum burst length
32 kb
General specifications
TFT display
640 × 480 VGA, 8.4"
Touch sensor
Analog resistive
Self-test
On power up
Processor
1.66 GHz N455
USB 2.0 
On instrument rear side
Hard disk drive
160 GB or higher
Keyboard
65 key USB
DRAM
1 GB
Operating system
Windows 7 
Monitor output
DB-15 VGA
Mouse
USB
Remote control
IEEE-488 or TCP/IP
Network interface
10/100/1000 MB Ethernet
Weight
16.34 kg (36 lbs.)
Power
285 W, 100-240 VAC
Size
218.4 mm × 419.1 mm × 488.9 mm (8.6 in. × 16.5 in. × 19.25 in.)